1Center for Basic MR Research, Northshore University Healthsystem, Evanston, IL, United States, 2Department of Biomedical Engineering, Northwestern University, Evanston, IL, United States
The processing rate for real-time multi-slice
image reconstruction on an FPGA can be improved significantly by taking
advantage of its parallel processing capability. In particular, multiple 2D FFT
processors can be embedded into a single FPGA and run simultaneously. In this
abstract, we report a new design of a 2D FFT processor with significant reduced
usage of hardware resource. Test results show that an important type of
resource, DSP48 slice, can be reduced by up to 50% without degrading processing
performance, which implies that more 2D FFT cores can be installed into a
single FPGA with a given size.
